‘Efficient Computing in the Post-Moore Era‘ by Per Stenstom

Опубликовано: 17 Февраль 2020
на канале: SAMOS Conference

Stamatis Vassiliadis Symposium
Title: Efficient Computing in the Post-Moore Era
Speaker: Per Stenstom, Chalmers University of Technology, Sweden

Slides: http://samos-conference.com/Resources...

Abstract: The free lunch is now over of leveraging on the growth of transistor count as offered by Moore’s Law over about five decades. Fortunately, there is a significant headroom for computer architects to use compute and memory resources more efficiently. Two such opportunities will be addressed in this talk. A first opportunity is to enable optimizations across the compute stack while retaining well-defined functional interfaces. I will first talk about a concept called across-the-stack cache optimization in which static information from the parallel programming model level is used by the runtime together with run-time statistics collected at the architecture level to enable a range of new cache optimizations, among them global dead-block cache management. A second opportunity I will cover is to remove data value redundancies in the cache/memory hierarchy. We have pioneered statistical cache/memory compression as a means to use cache and memory resources substantially more efficiently – many times more than 3X in compression ratio without imposing any harmful overhead on the critical memory access path. These are examples of many opportunities that will be explored in the years to come.